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Wafer Level Ultra CSP®: See Why it's the Industry Standard


Philips Semiconductor Integrated Passives using the K&S Ultra CSP process
XEMICS Codec using the K&S Ultra CSP process

Ultra CSP® from K&S is the Wafer Level Package (WLP) market share leader, due to its die-sized form factor, industry standard reliability and cost effective wafer-level manufacturing process. The Ultra CSP® process is compatible with standard SMT placement equipment and product lines and does not require underfill for final assembly.

Our patented Ultra CSP® process redistributes peripheral wire bond pads to area arrays, making it easy for you to migrate your existing TSOP or QFP package using your current IC designs. Ultra CSP is ideal for a wide range of ICs including memory devices (Flash, DRAM, EEPROM, SRAM), logic/analog components, power control devices and integrated passives in a variety of applications.

Ultra CSP® datasheet

Polymer Collar WLP" Protects Large Array Devices

The award-winning Polymer Collar WLP leverages all the advantages of the Ultra CSP® for larger array devices, and delivers 50% improved solder joint life. The Polymer Collar WLP utilizes an innovative supporting structure that surrounds the solder ball neck to produce significantly improved solder joint reliability, enabling more robust portable electronic end-use products.

Polymer Collar datasheet

New!
Spheron" WLP Solutions for Next Generation ICs

The Spheron WLP is the newest addition to the Flip Chip WLP family. A proven bump-on-polymer structure enables the Spheron WLP to provide optimized electrical performance for high end ICs. By utilizing a new polymer material, the Spheron WLP provides a WLP which is compatible with all IC final passivations.

Spheron WLP technology delivers reduced capacitive coupling, because the under bump metallization (UBM) and solder structure reside on top of a 5 micron low-k dielectric film. The film was developed for low modulus, high elongation value, excellent adhesion to organic and inorganic materials and good tolerance to exposure manufacturing tolerances. Reliability is enhanced by more than 30% because the UBM and solder structure reside on top of a planarized polymer film, eliminating poor metal step coverage and associated topology issues in conventional WLPs.

Combining optimal electrical performance with high reliability, Spheron WLP is your ideal choice for leading-edge IC devices.

Spheron" WLP A New WLP For Improved Performance (474k)

More information:

Technology Comparison

Wafer-Level Processing: Variations on a Theme
Published in Semiconductor Magazine, September 2002
A SEMI Publication

Continued Improvements in the Use of Alloys and Polymers Enhance Wafer-Level IC Performance
Published in Chip Scale Review, October 2002
by Deborah S. Patterson

Look for Wafer-Level Packaging to Rule as the Natural Choice for Opto Packages
Published in Chip Scale Review, July 2002
by Lee Levine


To learn more about Flip Chip International's Wafer Level Processing Solutions, please contact your local
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